The need for ever more powerful supercomputers does not appear to be slowing down, but the challenges to push computing to exaFLOP levels and beyond are becoming increasingly difficult. Targets for computing throughput, memory capacity, memory bandwidth, power efficiency, reliability, and cost make the construction of an Exascale machine to be a significant challenge. In this talk, I will first present an overview of current AMD technologies, and then I will describe one possible vision for a processor architecture that can be used to construct Exascale systems. We describe a conceptual Exascale Node Architecture (ENA), which is a computational building block for an Exascale supercomputer. The ENA consists of an Exascale Heterogeneous Processor (EHP) coupled with an advanced memory system. The conceptual EHP provides a high-performance accelerated processing unit (CPU+GPU), in-package high-bandwidth 3D memory, and aggressive use of die-stacking and chiplet technologies to meet the requirements for Exascale computing in a balanced manner. In addition to detailing our approach, I will also discuss some of the remaining open research challenges for the community.
Gabriel H. Loh is a Fellow Design Engineer in AMD Research, the research and advanced development lab for Advanced Micro Devices, Inc. Gabe received his Ph.D. and M.S. in computer science from Yale University in 2002 and 1999, respectively, and his B.Eng. in electrical engineering from the Cooper Union in 1998. Gabe was also a tenured associate professor in the College of Computing at the Georgia Institute of Technology, a visiting researcher at Microsoft Research, and a senior researcher at Intel Corporation. He is a Fellow of the IEEE and a Distinguished Scientist of the ACM, Hall of Fame member for the MICRO, ISCA, and HPCA conferences, (co-)inventor on over ninety US patent applications and fifty granted patents, and a recipient of the US National Science Foundation Young Faculty CAREER Award. His research interests include computer architecture, processor microarchitecture, emerging technologies and 3D die stacking.
In fact, the student chapter had a stand in the conference place, where Joao Aparicio, Joao Sequeira, Andre Pereira and Antonio Teixeira represented the ACM Student chapter.
ACM student chapter members had a significant scientific participation. In fact, Fernando Bento, Martinha Piteira, Joao Papricio, Catarina Santos, Sofia Aparicio and Hugo Araujo co-authored several papers presented at the conference. Fernando Bento, Martinha Piteira, Catariana Santos and Hugo Araujo presented papers at the conference.
The students were organized in the following working groups (or teams):
Team 1: Fátima Tomé, Pedro Dias, Pedro Calado, Patricia Nobrega
Team 2: Miguel Afonso, Fabio Damil
Team 3: Ana Massano, Sérgio Aires
Team 4: Cátia Henriques, Ângela Freixo, Catarina Canteiro, André Mendes
Team 5: Carla Silva, Ana Sofia Graça, Cláudia Souza
Team 6: Diana Teixeira, Melissa Garcia, Sandra Ricardo
Team 7: Volodymyr Mykhayliv, João Sardinha, Rafael Moisés, André Bolila
Team 8: Olena Mandzyuk,Nuno Mendes, Brenardo Pereira
João Sequeira and João Aparicio gave a lecture about Logistics and Robotics to a class of students from the IBS (ISCTE Business School). In this lecture, João Sequeira and João Aparicio introduced main robotics concepts to the students in the course of Information Systems and ERP (Master of Services and Technology Management). They also discussed possible impacts of using robotics in factories and warehouses. João Aparicio also talked about his experience in robot competition.
The chair of the ISCTE-IUL ACM Student Chapter Joao Aparicio delivered the Introduction to Programming Certification of Completion. He also gave a talk about Introduction to Robotics using Arduino. The course was developed and managed by Martinha Piteira, teacher at the School of Technology from the Instituto Politecnico de Setubal.