Advanced Computer Architecture for Exascale Computing: The AMD Research Perspective

Date: December, 11 2017 2:30pm
Place: ISCTE-IUL Room: J.J. Laginha Auditorium

Sponsor: ISTAR Lab, IUL

The need for ever more powerful supercomputers does not appear to be slowing down, but the challenges to push computing to exaFLOP levels and beyond are becoming increasingly difficult. Targets for computing throughput, memory capacity, memory bandwidth, power efficiency, reliability, and cost make the construction of an Exascale machine to be a significant challenge. In this talk, I will first present an overview of current AMD technologies, and then I will describe one possible vision for a processor architecture that can be used to construct Exascale systems. We describe a conceptual Exascale Node Architecture (ENA), which is a computational building block for an Exascale supercomputer. The ENA consists of an Exascale Heterogeneous Processor (EHP) coupled with an advanced memory system. The conceptual EHP provides a high-performance accelerated processing unit (CPU+GPU), in-package high-bandwidth 3D memory, and aggressive use of die-stacking and chiplet technologies to meet the requirements for Exascale computing in a balanced manner. In addition to detailing our approach, I will also discuss some of the remaining open research challenges for the community.

Gabriel H. Loh is a Fellow Design Engineer in AMD Research, the research and advanced development lab for Advanced Micro Devices, Inc. Gabe received his Ph.D. and M.S. in computer science from Yale University in 2002 and 1999, respectively, and his B.Eng. in electrical engineering from the Cooper Union in 1998. Gabe was also a tenured associate professor in the College of Computing at the Georgia Institute of Technology, a visiting researcher at Microsoft Research, and a senior researcher at Intel Corporation. He is a Fellow of the IEEE and a Distinguished Scientist of the ACM, Hall of Fame member for the MICRO, ISCA, and HPCA conferences, (co-)inventor on over ninety US patent applications and fifty granted patents, and a recipient of the US National Science Foundation Young Faculty CAREER Award. His research interests include computer architecture, processor microarchitecture, emerging technologies and 3D die stacking.